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0 to 9999 Up Down Counter with diffrent logic.

The code is designed using the 'VHDL function' to convert integer to bcd, more specifically binary to bcd. Features: Clock based as well as manual count Up and down count controlled using switch Push button to count manually LED to display count mode Asynchronous reset Post your comments, queries and suggestions   [Download links for project files are given below] Check Download Section or download from below. DE1 complete project: BCDUDOWNCOUNTER.zip Main entity: bcd_up_down_counter.vhd Components: manu_clk.vhd                     seg7.vhd

VHDL Tutorials

Hello Coders.  I am uploading a step by step tutorials for VHDL and working with Altera boards.. Which includes basic projects from this site.. Compiling them.. Using onboard components.. Do check them out on my youtube page. Here's the link for Tutorial Playlist: http://www.youtube.com/watch?v=x3sgK2HuCQg Suggest any modifications. I am going slow at some starting so everyone gets in phase easily. Mail your Queries @: prasadp4009@gmail.com

Frequency counter in VHDL (Synthesizeble)

Its Done...!! The Frequency Counter or Measurer is ready. You can measure any I/P frequency from 3Hz to 95KHz i.e. (95,000 Hz for DE1 board Cyclone II FPGA).(This can be diffrent for difrent FPGAs according to their propogation delays and other time factors). Above this value the FPGA gets unstable and show at-random values. There are 3 levels of Accuracy Hz. (displayed value) x 10 Hz. (displayed value) x 100 Hz.  I have put a reset button, which is Pushbutton when clicked initiate the frequency measurement process. It then holds the value for user to read.

Initializing M4K blocks for RAM. (For Altera FPGA users)

Hello Everybody. It seems you are having problem about how to initialize on-board memory using Megafunction Library and M4K blocks. (I am using Quartus II 10.1 SP1, but procees will be similar all other versions) So here are the steps of the solution: Start Quartus II and open new project.