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The code is designed using the 'VHDL function' to convert integer to bcd, more specifically binary to bcd. Features: Clock based as well as manual count Up and down count controlled using switch Push button to count manually LED to display count mode Asynchronous reset Post your comments, queries and suggestions   [Download links for project files are given below] Check Download Section or download from below. DE1 complete project: BCDUDOWNCOUNTER.zip Main entity: bcd_up_down_counter.vhd Components: manu_clk.vhd                     seg7.vhd

--Note: while building Project do include sec_clk and seg7 files which i posted library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use ieee.std_logic_unsigned.all; entity c09 is port( rst,clk: in std_logic;       op0,op1,op2,op3: out std_logic_vector(6 downto 0)); end c09; architecture count of c09 is component sec_clk Port (            clk             : in  std_logic;            rst : in std_logic;            op  : out std_logic            );     end component;     component seg7 port(m: in integer range 0 to 15;      num: out std_logic_vector(6 downto 0)); end component; signal flag: std_logic; signa...