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Showing posts with the label xilinx

Website is being updated with new UI!

Hi E veryone , Pardon me. It took me very long to get back on managing this website. You all during some part of a time in your life, you get so busy that you forget what you actually need to do to keep up. I am moving whole code database on Github so you all will never face any problem with finding codes. Feel free to follow me on Github for updates. My Github: https://github.com/prasadp4009   Stay tuned for updates. Thank you all.

16x2 LCD Controller in VHDL

Hello Everybody. The LCD 16x2 code is ready. Just one bug which is still not recognized. You need to program code 2 times on board to see it work. I dont know why its behaving like that. The text data is stored in a HEX file and is loaded onto the ROM of 32x8 byte size. It can be reconfigured easily. I will be uploading code in short of time with some new features. And after that be ready for a BMP decoder. Get ready with your pic to be seen on Monitor via FPGA. Updated: I didnt made  changes to code, if you program fpga 2 times without turning it off the code works(It worked on my DE1 board) I have uploaded project compiled for DE1 board, mail me your quiries, and if anyone finds bug in code. Project zip Download: LCD_TEST.zip

Another VHDL game... PacMan

Hello Everybody, hope you must have liked the PONG and Alarm Clock codes. This is another video of PacMan game I designed, with storing the sprite images of fruit and PacMan in ROM and retrieving them accordingly. Heres video of it. Enjoy VHDL. More Codes ahead. Keep Following..!!

RTC Clock with Alarm in VHDL

This is the code for RTC clock with manual setting and Alarm fuction. The video is uploaded on youtube. You can follow it for operation details. The code is standard with 24MHz input clk. It also has AMPM function which can be set while setting clock. The clock is free running and Alarm can be set on go. It is a new corrected code over Manual Set problem in previous code. The code files are given below: (The .sof file is precompiled for DE1 board and can be directly programmed to it.) Project Archieve: DigiClock.zip Video:

0 to 9999 Up Down Counter with diffrent logic.

The code is designed using the 'VHDL function' to convert integer to bcd, more specifically binary to bcd. Features: Clock based as well as manual count Up and down count controlled using switch Push button to count manually LED to display count mode Asynchronous reset Post your comments, queries and suggestions   [Download links for project files are given below] Check Download Section or download from below. DE1 complete project: BCDUDOWNCOUNTER.zip Main entity: bcd_up_down_counter.vhd Components: manu_clk.vhd                     seg7.vhd

Universal VGA Timing and Synchronizing Code

I have just found this code which is used by Columbia University Students in their projects. i would like to share it with you. It works probably with all Terasic Altera FPGA boards, Xilinx FPGA boards etc. The code is predesigned concidering 640x480 VGA resolution at 60Hz. But you can easily modify it using the VGA timing information from the site specified. Here are the links: For VGA timing    : http://martin.hinner.info/vga/timing.html VGA_Timing.vhd  : http://www.4shared.com/file/wdYoDlvR/vga_timing.html Don't forget to vote on polls. Mail me if you have any querries or want to do project at prasadp4009@vhdlcodes.com or prasadp4009@gmail.com . Enjoy Programming..!!

New Videos Check them Out..!!

Mail me if you have any querries: prasadp4009@gmail.com The First Video is: Digital Alarm Clock 2) Calculator using 16x2 LCD and Keyboard: 3) PONG GAME: 4) Mario Bouncing on monitor;